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Basic Phase Locked Loops

Phase locked loops are primarily used in communications circuits to demodulate FM and FSK signals. A complete understanding of their operation requires a knowledge of second order differential equations and Laplace transforms. However, it is possible to examine the operation of a simple PLL with little more than a basic knowledge of trigonometry.

Reference Articles

AN104A PLL Hardware Design and Simulation by Elanix

AN46 The PLL IC as a Communication System Building Block by National Semiconductor

PLLs for HF Transmitters and Receivers Part 1, Part 2, Part 3

TLC2932 PLL by Texas Instruments


Phase Locked Loop (Linearized)

These loops can be either digital or analog in nature however, their operation is easiest to analyze when they are composed of linear analog circuits.

let the input =

let the VCO output =

Then the multiplier output is:

After the LPF we obtain:

If then q is irrelevant and the circuit is not in lock.

However, if

the output is positive

the output is negative


Therefore this signal can be used to drive the VCO in such a way that it will force . This is the frequency locked state.

When , then the output of the LPF is , where q is the phase difference between the input and VCO output. Since this term is an odd function, it can be used to drive the VCO such that phase lock is maintained. Note that the zero error signal occurs when the input and VCO output are in phase quadrature.